In conventional semiconductor chips, e.g., respective memory chips, processors, etc., etc., for amplifying an interface signal at an input of the chip, a reference voltage is derived from a supply voltage (e.g. by the use of a voltage divider, and/or a diode, etc.).
In conventional comparators, the level of the reference voltage or quiscent point might be compared with the voltage level of the interface signal at the input of the chip. The comparison circuit must detect and then amplify rail-to-rail voltage changes as set by specification. For example, in “High Type” terminated systems, the quiscent point or reference voltage is defined as 70% of the supply voltage and the minimum level the comparator must be able to distinguish could be +−200 mV around this reference voltage. The maximum swing, however, is determined by the termination resistors used in the system.
Depending on the result of the comparation, in particular, depending on whether or not the voltage level of the interface signal is above or below the reference voltage level, a respective (amplified) “logic high”, or a respective “logic low” signal is output (or the other way round). Thereby, respective operational amplifiers might be used.
Typically, the comparator circuit is realised using a source coupled pair with a constant current sink/source.
Hence, in conventional semiconductor chips, the interface signal generally is amplified in the voltage domain.
However, variations in process, voltage, temperature and variations in the above reference voltage (due to switching noise, dc drift, etc.) might lead to a relatively bad quality of the output signal, e.g., might have a negative impact on the small set-up and hold times, etc., etc.
Such effects are especially problematic, and are especially difficult to control when the interface signal changes its state with a relatively high frequency (e.g., 500 MHz and more).